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i don't think the manufacturers would share what arch their deeply embedded cores are. Christopher Domas was the first person to interact with what he calls ring -4 to escalate from ring 3 to ring 0. the processors were old, and the ring -4 is not x86. I'm looking at a slide from 2019 that says that IME is a physically separate, non-x86 processor that boots minix

Now, i may be misremembering and i don't have time today to download all his talks and grep the .vtt for "ARM"; however, my memory is reinforced by literally 30 seconds of internet searches. i bought the Minix book because of one of the presentations.

i'm not doing any more research for free on this. Even if it isn't ARM, it isn't x86.



Uh-huh. Meanwhile, people reverse engineering the firmware are repeatedly saying it's x86. For example, https://puri.sm/posts/deep-dive-into-intel-me-disablement/

Are you perhaps looking at some slides from Cyber@UC Meeting 81, held Jan 16 2019, located at https://www.cyberatuc.org/files/slides/meeting_081.pdf which clearly say

> Physically separate processor embedded within the x86 processor that runs a custom MINIX image

and misreading that as saying more than what it does?

And those slides link to more resources saying it's an x86.


fine, you win. every bit of the CPU in an intel CPU is 100% x86. nevermind that the thing i am talking about is more "deeply embedded" than the management engine, has access to all registers, etc. oh and is specified to be RISC. I guess technically x86 is RISC, so...

you win.


Also running MINIX, and being physically separate? That's what you tried to quote as your proof.

And somehow this processor would also not be on the target list for Coreboot/Libreboot/Purism/Google people trying to de-ME their hardware?

Mr. Occam says I have very little reason to trust your recall/judgement, at this time.


preface: you brought up IME which isn't what i was talking about. that's ring -3. The thing i am talking about is either adjacent or "above" that in the hierarchy. I was not, and never spoke of the ME. i quoted the "physically separate" part for a reason, although if prodded, i couldn't have told you at the time. it isn't on the CPU die. anyhow:

It's funny that i knew about the minix even though according to your sources that wasn't what was running on the x86 chips until after they removed the RISC embedded cpu and switched to "x86." i've looked at your wiki link and followed the footnote, to an archive.org page where it is merely claimed that it is "now x86" and "running minix 3".

So we're at an impasse. I'm not downloading a bunch of youtube .vtt files and you've linked as authoritative sources as i have at this point; "someone said so."

that is: wiki cites the ptsecurity blogpost from august 2017 as the source for the claim that it is x86. furthermore, the blogpost claims that the architecture is "lakemont" which is 32nm, but the blog claims it's 22nm. Further, it claims it's specifically the quark, which was discontinued in 2019. i understand they can use the IP in the toolchain to put that on the main die, as well as build that part of the die at a larger size. However, there are a few other assertions that appear in there (in the code listings) that appear nowhere else on the internet.

oh, and ask mister occam if a physically separate chip (the Intel PCH 100 and up) counts as "embedded in the intel CPU" which is what i've been saying (ring -1, ring -4 are all on the physical die of the CPU.)

since we like wiki so much https://en.wikipedia.org/wiki/Platform_Controller_Hub that's where the ME is, per your link, first paragraph: It is located in the Platform Controller Hub of modern Intel motherboards.

I knew this was a waste of time, and now i spent an hour digging through crap that makes my eyes bleed like https://www.intel.com/content/www/us/en/content-details/3326...

you're talking about a completely separate chip, and that was a red herring. I'm pretty annoyed at myself right now.




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