> but if I understand it correctly you "just" need an openCL kernel and need to be able to shove the data back and forth somehow.
To use it with an FPGA accelerator you also have to build all the "hardware" to run said openCL kernel efficiently, manage data transfer, talk to the host, etc for the FPGA. This is very foreign if you're only used to doing software design and still very nontrivial even if you've done FPGA work, though I think there are some open hardware projects around doing this.
Yeah, i think the, especially efficient, data transfer would be my biggest enemy. I did quite a lot FPGA stuff in recent years, mainly CPU design stuff, a little pipelining and some hardware-software-codesign. So I should just see it as a toy project, start with said mnist to get atleast something running, don't matter if it's efficient and then work my way up. For example I haven't done anything PCIe related yet, but I guess there is enough IP available
To use it with an FPGA accelerator you also have to build all the "hardware" to run said openCL kernel efficiently, manage data transfer, talk to the host, etc for the FPGA. This is very foreign if you're only used to doing software design and still very nontrivial even if you've done FPGA work, though I think there are some open hardware projects around doing this.