DDR4 is an example case that's just not well automated yet. We've got the road map sketched out but it hasn't been a priority.
We're optimizing our development for features that make us immediately more productive at designing boards. Thus far that has been things like solvers for power supplies and automated component selection. The special case stuff will come later, when it becomes a bottleneck.
That makes sense - a buck regulator is a lot of component selection.
Do I read a "no" between the lines of my question regarding DDR3? I ask because that's a design segment you could automate to great effect. The DRAM is nearly always the riskiest part of an embedded processor design - so much so that many companies (even large ones in my experience) do not deviate from vendor generated reference designs.
